I never imagined he’d be caught by that mistake.
--
"So, let me tell you a little bit, a few of the problems, that ah, and the solutions that I see in building large computers. First of all... I think that building large computers should be done with the fewest possible people. One is perfect, but you can't quite work with one. So.. the next best thing is about 12."
"The reason you need 12 is you kind of need one person from each of the disciplines that are necessary. You need a mechanical engineer to build the box that it'll go in. You need an electrical engineer to put the circuit together. You need a little bit of logic... and programmer here and there And you need a secretary of course. But not very many."
However, during that time the market for lower-cost and acceptable performance computers was expanding very quickly, so IBM had growing revenues and profits, without being affected by the loss of a smaller market.
They were more strongly affected by the ascension of DEC, as the main vendor of minicomputers, which took the lower end of the market from IBM, but the medium-performance market, especially for business data processing, where the greatest profits were achievable, remained dominated by IBM, so they had little to worry about.
As a response to CDC 6600, IBM had the internal development project ACS (Advanced Computer Systems), which was eventually cancelled, as diverting resources from the money maker that was the IBM System/360 line.
Had ACS not been cancelled, it would have had good chances to become the fastest computer of the world, because its design team invented many techniques that were introduced in computers only almost a quarter of century later, e.g. unrestricted out-of-order and superscalar execution with fine-grained multi-threading.
Incompatible, increasingly archaic platforms, the best of those optimal for batch Fortran number crunching, counter to industry growth/interest. Organizational metastasis with a next gen platform (Cyber 180 as Star was stillborn - CISC from hell as 2nd system(s) syndrome) only at the end of the decade. Standards, coupled with profound organizational incompetence, ground it to dust. They made really good OEM disk drives for a while but sold the business off to fund their continuing failures.
There really needs to be a history that’s not an encomium to William Norris, Philosopher King of CDC.
The 180/990 and the 205 were a pretty good FORTRAN vector machines if that was the problem you wanted to solve; the compiler was quite good. The other 170/180s were...for everything else...not so much. That boat had sailed.
IBM 801 deserves to be called the first RISC machine, because its design methodology had the explicit goal of achieving a greater performance than IBM 370, by simplifying its instruction set, and it introduced all the principles later endorsed in the Berkeley and Stanford RISC designs (which later evolved into SPARC and MIPS).
CDC 6600 was not created by the simplification of an earlier architecture. It was more complex than the previous very simple CDC computers.
Nonetheless, it was designed to achieve the maximum performance permitted by the available technology and both James E. Thornton and Seymour Cray were extremely competent computer designers, so many of their design decisions coincide with those that were also preferred many years later for the RISC CPUs.
It should be noted that CDC 6600 had a simple instruction set relying on fast register-to-register operations, but nonetheless its ISA was not too simple, as in some misguided RISC designs. For example, it was one of the first, if not the first ISA which included indexed addressing with auto-update of the address register, which are very useful for implementing maximum-performance loops that access arrays (instruction pair fusion is a greatly inferior solution to having 1 bit per load/store instruction specifying auto-update).
IBM 801 also had addressing modes with auto-update, which were inherited from it by ARM, HP PA-RISC and IBM POWER. Aarch64 has also inherited them from 32-bit ARM. While x86-64 has addressing with auto-update only in a few special instructions, it has an alternative method for achieving the same performance in most cases, by having indexed addressing with up to 3 components and with scaled indices (taken from DEC VAX). This allows the use of the loop counter as also the index register for accessing multiple arrays, which eliminates the need for separate index updating instructions.
The CDC 6600 ISA also included the instruction originally proposed by Alan Turing and implemented in the Ferranti Mark 1 computer (as "sideways add"), which was later renamed as "population count" in the Cray 1 ISA, and which was added to the x86-64 ISA by the AMD Barcelona CPUs, and later by the Intel Nehalem CPUs. It is said that this instruction was added to CDC 6600 due to a request from NSA, which then became an important customer for the CDC supercomputers, and later for the Cray supercomputers.
If you want to improve your communications - when you finish writing your email, leave it as a draft for 30-40 minutes. Then go back an re-read it with a fresh viewpoint.
If I can suggest - the USAF has a manual for this, which guides you in being clear, concise, and specific:
https://static.e-publishing.af.mil/production/1/saf_aa/publi...